3D02200 - SEMI 3D22 - Guide on Measurements of Openings and Vias in Glass StdTpc-Documentation/Training 背景および動機付け

背景および動機付け

This Specification provides a symbology for marking hard surface reticle substrates within the edge exclusion area of the substrate

The test methods for the individual properties have been given in this Standard

if it exists

The SEMI E5 (SECS-II) Standard provides the definition of messages and related data items exchanged between host and equipment

3D02200 - SEMI 3D22 - Guide on Measurements of Openings and Vias in Glass StdTpc-Documentation/Training 背景および動機付け1 Purpose 1. 1 Through glass vias is an emerging technology in the semiconductor industry. Definitions for openings in glass have been described in SEMI 3D11, and a specification for glass as substrate for semiconductor applications with or without openings has been laid out in SEMI 3D16. However, there are few or no agreed upon test methods for measuring the physical and dimensional properties of through glass vias or other openings in glass or the